I/O Ports and I/O Memory
Every peripheral device is controlled by writing and reading its registers. Most of the time a device has several registers, and they are accessed at consecutive addresses, either in the memory address space or in the I/O address space. At the hardware level, there is no conceptual difference between memory regions and I/O regions: both of them are accessed by asserting electrical signals on the address bus and control bus (i.e., the read and write signals)* and by reading from or writing to the data bus.
Intel reference:
An I/O port can be an input port….Some I/O ports are used for transmitting data,
such as to and from the transmit and receive registers, respectively, of a serial interface device. Other I/O ports are used to control peripheral devices, such as the control registers of a disk controller.
I/O INSTRUCTIONS
The processor’s I/O instructions provide access to I/O ports through the I/O address space. (These instructions cannot be used to access memory-mapped I/O ports.) The register I/O instructions IN (input from I/O port) and OUT (output to I/O port) move data between I/O ports and the EAX register (32-bit I/O), the AX register (16-bit I/O), or the AL (8-bit I/O) register. The address of the I/O port can be given with an immediate value or a value in the DX register.
Kernel implementation:
Each device connected to the I/O bus has its own set of I/O addresses, which are usually called I/O ports.
Any : Understanding kernel - > subject: I/O Ports page 520
Custom I/O interfaces
Just to give an idea of how much variety is encompassed by custom I/O interfaces— thus by the devices currently installed in a PC—we’ll list some of the most commonly found:
Keyboard interface Connected to a keyboard controller that includes a dedicated microprocessor. This microprocessor decodes the combination of pressed keys, generates an interrupt, and puts the corresponding scan code in an input register.
Receiving data from I/O ports :
the I/O address space provides up to 65,536 8-bit I/O ports. Two signal request 16-bit port. Four special assembly language instructions called in, ins, out, and outs allow the CPU to read from and write into an
I/O port.
Each device are structured into a set of specialized registers: The CPU writes the commands to be sent to the device into the device control register and reads a value that represents the internal state of the device from the device status register. The CPU also fetches data from the device by reading bytes from the device input register and pushes data to the device by writing bytes into the device output
register.
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|||||||||||||| ==> output register ==>
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readable /proc/interrupts
CPU0
0: 168 IO-APIC-edge timer
1: 59 IO-APIC-edge i8042 <<< ====== 1 IRQ keyboard controller
6: 3 IO-APIC-edge floppy
8: 1 IO-APIC-edge rtc0
9: 0 IO-APIC-fasteoi acpi
12: 5572 IO-APIC-edge i8042 +++++ 12 IRQ line (mouse)
Dmesg =>
[ 0.840639] serio: i8042 KBD port at 0x60,0x64 irq 1
[ 0.840651] serio: i8042 AUX port at 0x60,0x64 irq 12
[ 1.111561] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input1
i8042 keyboard and mouse controller driver for Linux kernel
381 * i8042_start() is called by serio core when port is about to finish
382 * registering. It will mark port as existing so i8042_interrupt can
383 * start sending data through it.
384 */
385 static int i8042_start(struct serio *serio)
386 {
387 struct i8042_port *port = serio->port_data;
388
389 port->exists = true;
390 mb();
391 return 0;
392 }
Ivoke IRQ (handling)
Reading to header file: drivers/input/serio/i8042-io.h?v=3.4
45 #define I8042_COMMAND_REG 0x64
46 #define I8042_STATUS_REG 0x64
47 #define I8042_DATA_REG 0x60 < =
49 static inline int i8042_read_data(void)
50 {
51 return inb(I8042_DATA_REG);
52 }
I/O Privilege Level
In systems where I/O protection is used, the IOPL field in the EFLAGS register controls access to the I/O address space by restricting use of selected instructions. This protection mechanism permits the operating system or executive to set the privilege level needed to perform I/O. In a typical protection ring model, access to the I/O address space is restricted to privilege levels 0 and 1.
Change privilege level ring3
#include <sys/io.h>
#include <stdio.h>
int main()
{
int x=0;
iopl(3);
//outb(0x42,0x60);
printf("%x",inb(0x60));
x++;
return 0 ;
}
stealing ? :)
Scancodes:
The data from a keyboard comes mainly in the form of scancodes, produced by key presses or used in the protocol with the computer.
Output scancodes but translate to keyscan codes
drivers/tty/vt/keyboard.c
152 /*
153 * Translation of scancodes to keycodes. We set them on only the first
154 * keyboard in the list that accepts the scancode and keycode.
155 * Explanation for not choosing the first attached keyboard anymore:
156 * USB keyboards for example have two event devices: one for all "normal"
157 * keys and one for extra function keys (like "volume up", "make coffee",
158 * etc.). So this means that scancodes for the extra function keys won't
159 * be valid for the first event device, but will be for the second.
160 */
161
162 struct getset_keycode_data {
163 struct input_keymap_entry ke;
164 int error;
165 };
Header file : include/uapi/linux/input.h#L91
204 /*
205 * Keys and buttons
206 *
207 * Most of the keys/buttons are modeled after USB HUT 1.12
208 * (see http://www.usb.org/developers/hidpage).
209 * Abbreviations in the comments:
210 * AC - Application Control
211 * AL - Application Launch Button
212 * SC - System Control
213 */
214
215 #define KEY_RESERVED 0
216 #define KEY_ESC 1
217 #define KEY_1 2
218 #define KEY_2 3
219 #define KEY_3 4
220 #define KEY_4 5
221 #define KEY_5 6
222 #define KEY_6 7
223 #define KEY_7 8
224 #define KEY_8 9
225 #define KEY_9 10
226 #define KEY_0 11
227 #define KEY_MINUS 12
228 #define KEY_EQUAL 13
229 #define KEY_BACKSPACE 14
230 #define KEY_TAB 15
231 #define KEY_Q 16
232 #define KEY_W 17
233 #define KEY_E 18
234 #define KEY_R 19
235 #define KEY_T 20
236 #define KEY_Y 21
237 #define KEY_U 22
238 #define KEY_I 23
239 #define KEY_O 24
240 #define KEY_P 25
